# Posted By

woofeR on 01/16/10

# Statistics

Viewed 173 times
Favorited by 0 user(s)

# Thunderbird Tail Lights

/ Published in: VHDL
`module thunderbird(RT, LT, Haz, BR, CLK, LL, RL);	input RT, LT, Haz, BR, CLK;	output [2:0] LL, RL; 	reg [2:0] RTO, LTO;	reg HB;	reg [25:0] iClk; 	turn right(RT, iClk, RTO);	turn left(LT, iClk, LTO); 	initial	begin		HB = 0;	end 	always @(posedge CLK)	begin		iClk = iClk + 1;		if( iClk == 0)		begin			case(RT)			0:			begin				case(BR)				0:				begin					case(Haz)					0:					begin						RL = 3'b0;					end					1:					begin						case(HB)						0:						begin							RL = 3'b0; 						end						1:						begin							RL = 3'b111;						end						endcase					end					endcase				end				1:				begin					RL = 3'b111;				end				endcase			end			1:			begin				RL = RTO;			end			endcase			case(LT)			0:			begin				case(BR)				0:				begin					case(Haz)					0:					begin						LL = 3'b0;					end					1:					begin						case(HB)						0:						begin							LL = 3'b0; 						end						1:						begin							LL = 3'b111;						end						endcase					end					endcase				end				1:				begin					LL = 3'b111;				end				endcase			end			1:			begin				LL = LTO;			end			endcase			if ( HB == 1 )			begin				HB = ~HB;			end		end	end     endmodule module turn(S, Clk, O);	input S, Clk;	output [2:0] O; 	reg [2:0] O; 	always @(Clk)	begin		case(S)		0:		begin			O = 3'b0;		end		1:		begin			case(O)			3'b000:			begin				O = 3'b001; 			end			3'b001:			begin				O = 3'b011;				end			3'b011:			begin				O = 3'b111;			end			3'b111:			begin				O = 3'b000;			end			endcase		end		endcase	end endmodule`