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Circuit Design with VHDL Circuit Design with VHDL
This textbook teaches VHDL using system examples combined with programmable logic and supported by laboratory exercises. While other textbooks concentrate only on language features, Circuit Design with VHDL offers a fully integrated presentation of VHDL and design concepts by including a large number of complete design examples, illustrative circuit diagrams, a review of fundamental design concepts, fully explained solutions, and simulation results.

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Feb30th1712 on 05/10/08


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2×1 MUX

Published in: VHDL 

Two-to-one multiplexer.


Plain TextExpand 
  1. library ieee;
  2. use ieee.std_logic_1164.all;
  3.  
  4. entity MUX is
  5. 	port(
  6. 		A: in std_logic;
  7. 		B: in std_logic;
  8. 		S: in std_logic;
  9. 		Z: out std_logic
  10. 	);
  11. end MUX;
  12.  
  13. architecture main of MUX is
  14. begin
  15. 	with S select Z <= A when '0', B when '1';
  16. end main;

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